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Integrated Circuit Systems, Inc.
ICS9159-06
Preliminary Product Preview
Frequency Generator and Buffer for Pentium Systems
General Description
The ICS9159-06 is a low cost frequency generator designed specifically for Pentium systems. The integrated buffer minimizes skew and provides the early CPU clock required by some chipsets such as the OPTi VIPER.A 14.318 MHz XTAL oscillator provides the reference clock to generate standard Pentium frequencies. The CPU clock makes gradual frequency transitions without violating the PLL timing of internal microprocessor clock multipliers. Asynchronous 33.3 MHz PCI bus operation is supported, in-dependent of the CPU operating frequency. Green PC systems are supported through power-down, doze, and glitch-free stop clock modes.
Features
Four CPU clocks operate up to 66 MHz at 3.3V with glitch-free start and stop plus smooth transitions 3-6ns early CPU clock supports OPTi VIPER systems Selection of 8 frequencies, tristate, or power-down Six BUS clocks support asynchronous PCI bus operation
250ps skew between synchronous outputs Integrated buffer outputs drive up to 30pF loads 3.1V -5.5V supply range 28-pin 300-mil SOIC package
Applications
Ideal for green Pentium and 486 PCI systems
Block Diagram
Functionality
3.1 to 5.5V, 0-70 Crystal=14.318 MHz input
STP0# STP1# DOZE# FS(0:1) CPU(0:1) (MHz) CPU2, ECPU BUS(0:5) REF(0:3) (MHz) (MHz)
1 1 1 1 1 1 1 1 0 0 0 0
X X X X X X X X 1 0 0* 1
1 1 1 1 0 0 0 0 1 1 0* 0
00 01 10 11 00 01 10 11 -XX XX XX
66.6* 60* 50 40 33.3 30 25 22.5 Stop Stop Low
66.6* 60* 50 40 33.3 30 25 22.5 Run Stop Low
33.3 33.3 33.3 33.3 16.7 16.7 16.7 16.7 Run Stop Low
14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318
Tristate Tristate Tristate 14.318
* 3.3 volt operation only. ** 000 mode powers-down the PLL sections and forces the outputs low. To ensure glitchfree start and stop of the CPU and BUS clocks enter 000 from 001 and exit 000 through 001.
COMPAQ is a trademark of Compaq Computers. Pentium is a trademark of Intel Corporation. 9159-06 Rev C 091897
PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice.
ICS9159-06
Preliminary Product Preview Pin Configuration
28-Pin 300-mil SOIC Pin Descriptions
PIN NUMBER 8, 26 1 2 3, 11, 23 6, 7, 9 4, 5 20 15, 16, 18 19, 21, 22 24, 25, 27, 28 10 12 13, 14 17 PIN NAME VDD X1 X2 GND CPU(0:2) FS(0:1) VDDB BUS(0:5) REF(0:3) ECPU DOZE# STP0#, STP1# GNDB TYPE PWR IN OUT PWR OUT IN PWR OUT OUT OUT IN IN PWR DESCRIPTION Power for logic, CPU and fixed frequency output buffers. XTAL or external reference frequency input. This input includes XTAL load capacitance and feedback bias for a 0.5 - 20 MHz XTAL.** XTAL output which includes XTAL load capacitance.** Ground for logic, CPU and fixed frequency output buffers. Processor clock outputs which are a multiple of the input reference frequency as shown in the table. Frequency multiplier select pins. See table. These inputs have internal pull-up devices. Power for BUS output buffers. Bus clock outputs are fixed at 33.3 or 16.7 MHz.* REF is a buffered copy of the crystal oscillator or reference input clock, nominally 14.31818 MHz.* Early processor clock output which is the same frequency as CPU(0:2). This clock leads CPU(0:2) by 3-6nS. Reduces CPU, ECPU and BUS clock outputs as shown in the functionality table when at a logic low level. Synchronously stops the CPU, ECPU and BUS clocks per the description in the functionality table. Can also be used to tristate all outputs when the DOZE pin is low. This ground return path is brought on separately to permit separating the noise impulses from high output buffers from affecting sensitive internal circuitry.***
* Assuming 14.31818 MHz input clock or crystal. * * Device provides 18pF load for crystal load capacitance at each pin. *** Ground for bus clock buffers.
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ICS9159-06
Preliminary Product Preview
Absolute Maximum Ratings
Supply Voltage .......................................................................................................... 7.0 V Logic Inputs ....................................................................... GND 0.5 V to VDD +0.5 V Ambient Operating Temperature ............................................................. 0C to +70C Storage Temperature ........................................................................... 65C to +150C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Electrical Characteristics at 3.3V
VDD = 3.0 3.7 V, TA = 0 70 C unless otherwise stated
DC Characteristics PARAMETER Input Low Voltage Input High Voltage Input Low Current Input High Current Output Low Current
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SYMBOL VIL VIH IIL IIH IOL IOH IOL IOH VOL VOH VOL VOH IDD IDD (PD) IDD (STOP) VIN=0V
TEST CONDITIONS
MIN 0.7VDD -28.0 -5.0 30.0 25.0 2.4 2.4 -
TYP -10.5 47.0 -66.0 38.0 -47.0 0.30 2.8 0.30 2.8 55 8 35
MAX 0.2VDD 5.0 -42.0 -30.0 .4 .4 110 20 70
UNITS V V A A mA mA mA mA V V V V mA mA mA
VIN=VDD VOL=0.8V; for CPU & BUS VOL=2.0V; for CPU & BUS VOL=0.8V; for REF VOL=2.0V; for REF IOL=15mA; for CPU & BUS IOH=-30mA; for CPU & BUS IOL=12.5mA; for REF IOH=-20mA; for REF @66.66 MHz; all outputs unloaded @000 Mode (Power-down) @001 Mode (Stop Mode)
Output High Current1 Output Low Current
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Output High Current1 Output Low Voltage Output High Voltage1 Output Low Voltage Output High Voltage1 Supply Current Supply Current, Power-down Supply Current, Stop Mode
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
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ICS9159-06
Preliminary Product Preview Electrical Characteristics at 3.3V
VDD = 3.1 3.7 V, TA = 0 70 C
AC Characteristics PARAMETER Rise Time1 Fall Time1 Rise Time1 Fall Time1 Duty Cycle1 Jitter, One Sigma1 Jitter, Absolute1 Jitter, One Sigma1 Jitter, Absolute1 Input Frequency1 Crystal Oscillator Capacitance1 Power-on Time1 Frequency Settling Time1 Clock Skew Window1 Clock Skew Window1 Clock Skew Window1 SYMBOL Tr1 Tf1 Tr2 Tf2 Dt Tj1s Tjab Tj1s Tjab Fi CINX ton ts Tsk1 Tsk2 Tsk3 TEST CONDITIONS 20pF load, 0.8 to 2.0V, CPU & BUS 20pF load, 2.0 to 0.8V, CPU & BUS 20pF load, 20% to 80%, CPU & BUS 20pF load, 80% to 20%, CPU & BUS 20pF load; @VOUT=1.4V CPU; ECPU Load=20pF; FOUT >25 MHz CPU; ECPU Load=20pF, FOUT >25 MHz BUS(0:2); REF(0:3); CPU25 MHz; Load=20pF; Comp. to the period BUS(0:2); REF(0:3); CPU 25 MHz; Load=20pF; Comp. to the period 0.5 14.318 20 MHz Logic Input Capacitance 1 CIN Logic input pins X1, X2 pins From VDD=1.6V to 1 st crossing of 66.6 MHz VDD supply ramp < 40ms From 1 st crossing of acquisition to <1% settling CPU to CPU; Load=20pF; @1.4V BUS to BUS and REF to REF; Load=20pF; @1.4V ECPU to CPU(0:2); Load=20pF; @1.4V MIN 40 -350 -3.0 3.0 TYP 0.9 0.8 1.5 1.4 50 60 0.7 5 18 2.5 2.0 150 300 5.0 MAX 1.5 1.4 2.5 2.4 60 150 350 2.0 3.0 4.5 4.0 250 500 6.0 UNITS ns ns ns ns % ps ps % % pF pF ms ms ps ps ns
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
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ICS9159-06
Preliminary Product Preview
Electrical Characteristics at 5.5V
VDD = 4.5 5.5 V, TA = 0 70 C
DC Characteristics PARAMETER Input Low Voltage Input High Voltage Input Low Current Input High Current Output Low Current1 Output High Current1 Output Low Current1 Output High Current1 Output Low Voltage Output High Voltage1 Output Low Voltage Output High Voltage1 Supply Current Supply Current, Power-down Supply Current, Stop Mode SYMBOL VIL VIH IIL IIH IOL IOH IOL IOH VOL VOH VOL VOH IDD IDD(PD) IDD(STOP) VIN = 0V VIN = VDD VOL = 0.8V; for CPU & BUS VOL = 2.0V; for CPU & BUS VOL = 0.8V; for REF VOL = 2.0V; for REF IOL = 20mA; for CPU & BUS IOH = -70mA; for CPU & BUS IOL = 15mA; for REF IOH=-50mA; for REF @50.0 MHz; all outputs unloaded @000 Mode (Power-down) @001 Mode (Stop Mode) TEST CONDITIONS MIN 0.7VDD -40.0 -5.0 40.0 30.0 2.4 2.4 TYP 16.0 62.0 -140.0 50.0 -100.0 0.3 2.8 0.30 2.8 95.0 16.0 70.0 MAX 0.2VDD 5.0 -90.0 -60.0 0.4 .4 200.0 40.0 140.0 UNITS V V A A mA mA mA mA V V V V mA mA mA
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
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ICS9159-06
Preliminary Product Preview Electrical Characteristics at 5.5V
VDD = 4.5 5.5 V, TA = 0 70 C
AC Characteristics
PARAMETER Rise Time1 Fall Time1 Rise Time1 Fall Time1 Duty Cycle1 Duty Cycle1 Jitter, One Sigma1 Jitter, Absolute1 Jitter, One Sigma1 Jitter, Absolute1 Input Frequency1 Logic Input Capacitance1 Crystal Oscillator Capacitance1 Power-on Time1 Frequency Settling Time1 Clock Skew Window1 Clock Skew Window1 Clock Skew Window1
SYMBOL Tr1 Tf1 Tr2 Tf2 Dt1 Dt2 Tj1s Tjab Tj1s Tjab Fi CIN CINX ton ts Tsk1 Tsk2 Tsk3
TEST CONDITIONS 20pF load, 0.8 to 2.0V, CPU & BUS 20pF load, 2.0 to 0.8V, CPU & BUS 20pF load, 20% to 80%, CPU & BUS 20pF load, 80% to 20%, CPU & BUS 20pF load; @VOUT=1.4V 20pF load; @VOUT=50% CPU; ECPU Load=20pF; FOUT > 25 MHz CPU; ECPU Load=20pF, FOUT > 25 MHz BUS(0:2); REF(0:3); CPU25 MHz; Load=20pF; Comp. to the period BUS(0:2); REF(0:3); CPU25 MHz; Load=20pF; Comp. to the period
MIN 50 40 -350 -3.0 0.5
TYP 0.55 0.52 1.2 1.1 56 50 60 0.7 14.318 5 8 2.5 2.0 150 300 5.0
MAX 0.95 0.90 2.1 2.0 70 60 150 350 2.0 3.0 20 4.5 4.0 250 500 6.0
UNITS ns ns ns ns % % ps ps % % MHz pF pF ms ms ps ps ns
Logic input pins X1, X2 pins From VDD=1.6V to 1st crossing of 50.0 MHz VDD supply ramp < 40ms From 1 st crossing of acquisition to < 1% settling CPU to CPU; Load=20pF; @1.4V BUS to BUS and REF to REF; Load=20pF; @1.4V ECPU to CPU(0:2); Load=20pF; @1.4V
3.0
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
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ICS9159-06
Preliminary Product Preview
LEAD COUNT DIMENSIONL
28L 0.704
SOIC Package Ordering Information
ICS9159M-06
Example:
ICS XXXX M-PPP
Pattern Number(2 or 3 digit number for parts with ROM code patterns) Package Type
M=SOIC, SOP
Device Type (consists of 3 or 4 digit numbers) Prefix
ICS=Standard Device
PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice.
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